Hello all:
In order to use this bios properly , I recommend that when you update the bios , remember to use the clear CMOS switch in AWARDFLASH or WINFLASH ...
2/17.b01 is 100% the same romsip as 2/15 , but 2/15's Internal dram timing control is the fatest due to it set T(DOE) , T(RRD) , and T(R2P) to 0 by default
2.17.b02 is based on 2.17.b01 , but replace the 12-18 romsip table using 1-31 romsip table ...
ROMSIP table is [ ROM Serial Initialization Protocol table ] , there will be some data located in the bios chip for the chipset to initialize the K7 CPU Bus(it's called S2K Bus) , this table will affect the CPU Bus performance/stability and this table will vary from different multiplier(K7 S2K CPU Bus need different data for different multiplier) ...
It looks like no single table can meet everyone's requirement ... but if the difference is only in a few MHz range , I am afraid that we have to make some choice , it's not possible for me to generate several bios at the same time ...
Actually I am not a BIOS engineer , I am a hardware designer from the old BP6 days(my first project when I study in college) ...
But in order to do something even better , I have to do somtething extra when the BIOS engineer does not have enough time to do these extra funtion ...
It's hard for me to say to BIOS engineer " Hey , Just generate 10 kind of bios release candidate for me to use "
What's your comment about how we can make a choice ???
:QQQ: 
